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PWM Duty Cycle

The duty cycle describes the pulse width as a percentage of the period. By switching the signal level with the specified duty cycle, the output signal will be approximated to the desired level. The 100% duty cycle means that the output level is HIGH. The 0% duty cycle means that the output level is LOW. The 50% duty cycle means that the output level is in the middle between HIGH and LOW.

You can define the duty cycle of the PWM calling the DlnPwmSetDutyCycle() function. To check the current duty cycle, use the DlnPwmGetDutyCycle() functions.

The default duty cycle value depends on the DLN adapter.

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