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How PWM Works

A DLN-series adapter generates digital pulses with a certain frequency. Each cycle includes the signal in a HIGH (1) and the following LOW (0) states.

The amount of time the signal is in a HIGH state as a percentage of the total time of one cycle describes the duty cycle.

A duty cycle and a frequency are two main parameters that define a PWM signal.

By cycling a digital signal HIGH and LOW at a fast rate and with a certain duty cycle, the PWM output behaves like a constant voltage analog signal when providing power to devices.

Having a DLN adapter that can generate a digital signal either HIGH (3.3V) or LOW (0V), you can create a 2.3V signal with a PWM module specifying a duty cycle as 61%. The PWM module outputs 3.3V 70% of the time. If the PWM frequency is fast enough, then the voltage seen at the output appears to be average voltage and can be calculated by taking the digital high voltage multiplied by the duty cycle: 3.3V x 0.7 = 2.31V.

PWM 61%

Selecting a duty cycle 30% would produce 0.99V signal:

PWM 30%

The PWM Interface is present in all DLN-series adapters. Some DLN adapters can have more than one PWM ports. Each PWM port includes several channels (Read PWM Channels). The number of ports and channels depends on the type of your DLN adapter.

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