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SPI Bus Structure

The SPI bus uses four signal lines:

  • SCK (Clock) – The master generates the clock to synchronize data transmission.

  • MOSI (Master Output, Slave Input) – The master sends data on the MOSI line, the slave receives it.

  • MISO (Master Input, Slave Output) – The slave sends data on the MISO line, the master receives it.

  • CS or SS (Chip Select or Slave Select) – The master drops the SS line to select the specific SPI slave device. The DLN adapters have several SS lines that you can connect to different slave devices.

Among these four lines, two of them (MOSI and MISO) are data lines, the other two (SS and SCK) are control and synchronization lines.

The SPI bus with a single master and a single slave connects the devices in the following way:

SPI Single Slave

The SPI bus with a single master and multiple slaves connects the devices in the following way:

SPI Multi Slave

There are different ways to connect multiple slaves to a single master. See Connecting Multiple Slave Devices for additional information.

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