To understand the SPI interface structure, first, we need to look at its lines. There are 4 lines in total (2 data lines and 2 service lines):
- CS (chip select) or SS (slave select) line - allows/disallows operation with slave device.
- MISO (Master input slave output) data line - data can be transferred from slave to master over this line.
- MOSI (Master output slave input) data line - data can be transferred from master to slave device over this line.
- CLK (clock) line - Clock signal.
When the signal from CS service line is inverted (equals to 1) slave device is inactive, when CS signal equals to 0, master device can transfer or receive data to/from slave device. This line allows to connect several slave devices to master, so we can choose the slave device for data transfer over SPI interface.
Another service line is CLK. It generates clock signal. While data is transferred over SPI interface, CLK line is also generating clock signal. Its frequency determines the data transfer speed over SPI. CLK signal is transferred with the same frequency as data flows. Thus there is no need to synchronize the transfer speed of master and slave devices.
MOSI (Master Output Slave Input) line - data line which is used for data transferring from master device to slave device.
MISO (Master Input Slave Output) line - data line, which is used for data transferring from slave device to master device.