I2C (Inter-Integrated Circuit) is a multi-master, multi-slave, single-ended, serial bus invented by Philips Semiconductor (now NXP Semiconductors). It is typically used for attaching low-speed peripheral ICs to processors and microcontrollers.
I2C can be used to control a wide range of devices: analogue-to-digital and digital-to-analog converters (ADCs and DACs), LCD and OLED displays, keyboards, LED and motor drivers, memory chips and cards (EEPROM, RAM, FERAM, Flash), pressure and temperature sensors and other peripheral devices.
I2C bus specification describes four operating speed categories for bidirectional data transmission:
Standard-mode (Sm) | a bit rate up to 100 kbit/s |
Fast-mode (Fm) | a bit rate up to 400 kbit/s |
Fast-mode Plus (Fm+) | a bit rate up to 1 Mbit/s |
High-speed mode (Hs) | a bit rate up to 3.4 Mbit/s |
One more speed category, Ultra-fast mode (UFm), stands for unidirectional data transmission up to 5 Mbit/s.
DLN-series adapters can operate in Standard, Fast and Fast Plus modes.
I2C bus uses two lines – SDA (Serial Data line) and SCL (Serial Clock line). Every device connected to the I2C bus can operate as either I2C master (generates the clock and initiates communication with slaves) or I2C slave (responds when addressed by the master).
DLN-series adapters can operate as master devices (read I2C Master Interface). Some DLN adapters can also operate as slave devices (read I2C Slave Interface).
The I2C bus is a bidirectional bus, but this does not mean that the data is transmitted in both directions simultaneously. At every particular moment, either master or slave sends data over the I2C bus. The device that sends data to the bus is called Transmitter. The device that receives data from the bust is called Receiver. Most I2C devices can both transmit and receive data. However, some I2C devices are only able to receive data. DLN adapters are capable of transmitting and receiving data.
The I2C bus is a multi-master bus; that means that any number of master devices can be present. The DLN-series adapters support clock synchronization and arbitration to avoid conflicts with other master devices on the same I2C bus. Read Avoiding Conflicts in a Multi-master I2C Bus for details.
The maximum number of slave devices is limited by the address space. Each slave device has a unique address. The I2C bus can use 7 or 10-bit addressing. The DLN-series adapters use 7-bit addressing.
Both SDA and SCL are bidirectional lines, connected to a positive supply voltage via a pull-up resistor.
All the devices connected to the I2C bus must have an open-drain (or open-collector) output stages – they can either pull the bus low or be in high-impedance. When there is no data transmission on the I2C bus, both lines are HIGH. In this case, we say that the I2C bus is free.
I2C master generates clock signal on the SCL line. One SCL pulse is generated for each data bit. The data on the SDA line must be stable during the HIGH period of the clock (while SCL line is high). The changes on the SDA line occur when the SCL line is LOW. The only exception from this rule are START, STOP and Repeated START Conditions described later.
Every byte, sent over the I2C bus, is eight bits long. Data is transferred with the Most Significant Bit (MSB) first. An Acknowledge bit must follow each byte. The master generates all clock pulses, including the acknowledge clock pulse.
The Acknowledge bit allows:
The receiver to signal the transmitter that the byte was successfully received and another byte may be sent;
The receiver to signal the transmitter that it received enough data and the transmission should be terminated;
The slave to signal the master that the specified slave address is present on the bus and transmission can start (see Slave Address and Data Direction);
The slave to delay the transmission, while it prepares for another byte of data (see Clock Stretching for details).
After transmission of the last eighth bit of data, the transmitter releases the SCL line (during the low phase of clock). This gives an opportunity to receiver to acknowledge (or not acknowledge) the data.
If the receiver pulls the line LOW during the HIGH period of the ninth clock pulse, it acknowledges the byte (the Acknowledge (ACK) signal).
The Not Acknowledge (NACK) signal is defined when SDA remains HIGH during this clock pulse. The master then can generate either a STOP (P) condition to abort the transmission, or a repeated START (Sr) condition to start a new transmission.
The following conditions can lead to the Not Acknowledged (NACK) signal:
There is no device to acknowledge the slave address – no slave with the specified address is connected to the I2C bus.
The slave is unable to receive or transmit – it is busy performing another function.
The slave does not support the specified data direction (read or write).
The receiver gets data that it does not understand.
The receiver cannot receive any more data bytes.
A master-receiver must signal the end of the transmission to the slave-transmitter.
The data transmission includes the following steps:
The master initiates communication by generating a START (S) Condition;
The master sends the first byte that includes a Slave Address and Data Direction;
The slave generates the acknowledgement (ACK) signal. If the master receives no acknowledgement signal, it generates the STOP (P) condition to terminate the transmission.
The transmitter (master or slave) writes a byte of data to the bus and the receiver (slave or master) reads this byte of data from the bus.
After each byte of data, the receiver sends the acknowledgement (ACK) signal and the transmission continues. If the receiver sends no acknowledgement signal, the transmitter stops writing data to the I2C bus.
To terminate transmission, the master generates the STOP (P) Condition. To change transmission parameters, the master generates the Repeated START (Sr) Condition.
All transactions begin with a START (S) condition and finish with a STOP (P) condition.
To generate a START condition, the master changes the SDA line from one to zero while the SCL line is HIGH (marked in red on the following diagram). The I2C bus is considered busy after the START condition. To prepare the bus for transmission of the first bit, the master outputs zero on the SCL line (marked in green).
To generate a STOP condition, the master changes the SDA line from zero to one while the SCL line is HIGH (marked in red). The I2C bus is considered free after the STOP condition. To prepare for the STOP condition, the master sets the SDA line to zero during the LOW phase of the SCL line (marked in green).
Instead of the STOP condition, the master can generate a repeated START (Sr) condition. Like a START condition, to generate a repeated START condition, the master changes the SDA line from one to zero while the SCL line is HIGH (marked in red). In this case, the I2C bus remains busy. To prepare for the repeated START condition, the master sets the SDA line to one during the LOW phase of the SCL line (marked in green).
The START (S) and repeated START (Sr) conditions are functionally identical. The repeated start conditions is used in the following situations:
To continue transmission with the same slave device in the opposite direction. After the repeated START condition, the master sends the same slave device address followed by another direction bit.
To start transmission to or from another slave device. After the repeated START condition, the master sends another slave address.
To provide a READ operation from internal address. See READ Operation for details.
DLN adapters use the repeated START condition to read from the internal address (the DlnI2cMasterRead() function) and to write to and then read from the same slave device (the DlnI2cMasterTransfer() function). If a DLN adapter needs to communicate with different slaves, it finishes one transmission (with the STOP condition) and starts another transmission.
Every byte on the SDA line must be eight bits long. The first byte after START contains seven bits of the slave device address and one bit that defines the direction of the transmission.
As any other data, the address is transmitted sequentially starting with the Most Significant Bit (MSB) and ending with the Least Significant Bit (LSB).
The direction bit has the following values:
0 – Write: the master transmits data to the slave;
1 – Read: the master receives data from the slave.
There are 16 reserved I2C addresses. The following table shows the purposes of these addresses:
I2C slave address | Direction bit (R/W) | Description |
0000 000 | 0 | General call address |
0000 000 | 1 | START byte |
0000 001 | X | CBUS address |
0000 010 | X | Reserved for different bus format |
0000 011 | X | Reserved for future purposes |
0000 1XX | X | Hs-mode master code |
1111 1XX | 1 | Device ID |
1111 0XX | X | 10-bit slave addressing |
The general call address is for addressing all devices connected to the I2C bus. If a device does not need the provided data, it can ignore this address (it does not issue the acknowledgement). If a device requires data from a general call address, it acknowledges this address and behaves as a slave-receiver. If one or more slaves acknowledge the general call address, the master does not know how many devices did it and does not see not-acknowledged slaves.
If you use a DLN-series adapter as I2C slave, you can configure it to support general call addressing or to ignore it.
Some I2C slave devices have fixed internal address setting. The internal address is the slave’s internal register. Possible internal addresses depend on the slave device. Some very simple devices do not have any, but most do.
To communicate with a certain register, after the I2C master addressed the slave device and received acknowledgement, it sends the internal address inside the slave where it wants to transmit data to or from.
Both read and write operations can use an internal address. When an internal address is set, the same address is used in every READ and WRITE operations that follows the previous operation.
To write to a slave device, the I2C master follows these steps:
Sends the START (S) condition.
Sends the I2C address of the slave device.
Sends the WRITE (W) direction bit.
Receives the acknowledgement (ACK) bit.
Sends the internal address where it wants to write.
Receives the acknowledgement (ACK) bit.
Sends data bytes and receives the acknowledgement (ACK) bit after each byte.
Sends the STOP (P) condition.
To write data using internal address, call the DlnI2cMasterWrite() function. It requires the slave device address (the slaveDeviceAddress
parameter), the length of the internal address (the memoryAddressLength
parameter) and the internal address (the memoryAddress
parameter).
Before reading data from the slave device, the master tells the slave which of the internal addresses it wants to read. Therefore, a read operation starts by writing to the slave.
To read from a slave device, the I2C master follows these steps:
Sends a START (S) condition.
Sends the I2C address of the slave device.
Sends the WRITE (W) direction bit.
Receives the acknowledgement (ACK) bit.
Sends the internal address where it wants to read from.
Receives the acknowledgement (ACK) bit.
Sends the repeated START (Sr) condition.
Sends the READ (R) direction bit.
Receives the acknowledgement (ACK) bit.
Receives data bytes and sends acknowledgement (ACK) bits to continue reading or a not acknowledgement (NACK) bit to stop reading.
Sends the STOP (P) condition.
To read data using internal address, call the DlnI2cMasterRead() function. It requires the slave device address (the slaveDeviceAddress
parameter), the length of the internal address (the memoryAddressLength
parameter) and the internal address (the memoryAddress
parameter).
In a multi-master I2C bus, the collision when more than one master simultaneously initiate data transmission is possible. To avoid the chaos that may ensue from such an event, DLN adapters, like all I2C master devices, support clock synchronization and arbitration. These procedures allow only one master to control the bus; other masters cannot corrupt the winning message.
Clock synchronization allows to perform the level on the SCL line. Arbitration determines which master completes transmission. If a master loses arbitration, it turns off its SDA output driver and stops transmitting data.
Slaves are not involved in clock synchronization and arbitration procedures.
A DLN adapter and one or more I2C masters can begin transmitting on a free I2C bus at the same time. Each master generates its own clock on the SCL line. Therefore, there must be a method for deciding which master generates LOW and HIGH periods of the SCL line. Clock synchronization does it.
Once a DLN adapter or any other I2C master outputs LOW on its clock line, the SCL line goes LOW. When a master releases its clock line, the SCL line goes HIGH only if no other master has its clock line in LOW state. The master with the longest LOW period holds the SCL line in LOW state. Masters with shorter LOW periods stay in a HIGH wait-state during this time.
When all masters concerned have released their clock lines, the SCL line goes HIGH and all the masters start counting their HIGH periods. The first master that completes its HIGH period pulls the SCL line LOW again.
Therefore, the master with the longest clock LOW period determines a LOW period on the SCL line; the master with the shortest clock HIGH period determines a HIGH period on the SCL line.
The following figure shows clock synchronization for the DLN adapter and the Master2 device. The DLN adapter has a shorter HIGH period; it pulls the SCL line LOW. The Master2 device has a longer LOW period, only when it releases its clock line, both masters start counting HIGH period.
Arbitration, like clock synchronization, is required only if more than one master is used in the system. A master may start transmission only if the bus is free. A DLN adapter and one or more other masters may generate a START condition within the minimum hold time, which results in a valid START condition on the bus. Arbitration is then required to determine which master will complete its transmission.
Arbitration proceeds bit by bit. During every bit, while SCL is HIGH, each master checks to see if the SDA level matches what it has sent. If at least one master outputs LOW, the SDA line will have the LOW level. If a master changes the state of the SDA line to HIGH, but the line stays in LOW, then this indicates that this master lost arbitration and it needs to back off.
The arbitration process may take many bits. More than one masters can even complete an entire transaction without error if their transmissions are identical.
A master that loses the arbitration can generate clock pulses until the end of the byte in which it loses the arbitration and can restart its transaction when the bus is free.
If a master can act as a slave and it loses arbitration during the addressing stage, it must switch immediately to its slave mode because the winning master may try to address it.
The following figure shows the arbitration procedure for the DLN adapter and the Master2 device. The moment when there is a difference between the DATA1 level and the actual level on the SDA line, the DLN adapter switches off the DATA1 output.
In an I2C communication, a master device determines the clock speed. The I2C bus provides an explicit clock signal that relieves a master and a slave from synchronizing exactly to a predefined baud rate.However, some slave devices may receive or transmit bytes of data at a fast rate, but need more time to store a received byte or prepare another byte to be transmitted. Slaves can then hold the SCL line LOW to force the master into a wait-state until the slave is ready for the next byte transmission. This mechanism is called clock stretching. An I2C slave is allowed to hold the SCL line LOW if it needs to reduce the bus speed. The master on the other hand is required to read back the SCL signal after releasing it to the HIGH state and wait until the SCL line has actually gone HIGH. DLN-series adapters support clock stretching. Taking into consideration the impacts of clock stretching, the total speed of the I2C bus might be significantly decreased.
All DLN-series adapters support I2C master interface. Some of them can have several independent I2C ports. To know the number of available I2C master ports, use the DlnI2cMasterGetPortCount() function.Before using the I2C bus for transmitting data, you need to configure the I2C master port and enable it (see Configuring the I2C Master Interface). To stop using the I2C master port, you can disable it by the DlnI2cMasterDisable() function.
To start using the I2C master port, you need to configure the I2C master interface:
Configure the I2C frequency. This parameter influences the speed of data transmission. For details, read I2C Speed and Frequency.
Configure the number of attempts to resend data if Not Acknowledgement is received. For details, read Reply Count.
Enable the I2C master port. If the pins of the I2C port are not used by other modules, you can enable the I2C master port by the DlnI2cMasterEnable() function.
I2C bus specification describes four operating speed categories for bidirectional data transmission:
Standard-mode (Sm) | a bit rate up to 100 kbit/s |
Fast-mode (Fm) | a bit rate up to 400 kbit/s |
Fast-mode Plus (Fm+) | a bit rate up to 1 Mbit/s |
High-speed mode (Hs) | a bit rate up to 3.4 Mbit/s |
One more speed category, Ultra-fast mode (UFm), stands for unidirectional data transmission up to 5 Mbit/s.
Configuring the I2C master interface, you can specify the frequency value by calling the DlnI2cMasterSetFrequency() function.
The range of supported frequency values depends on the DLN adapter:
DLN-1 and DLN-2 adapters support frequency from 1kHz up to 4MHz.
DLN-4 adapters support frequency from 1.47kHz up to 1MHz.
The quality of I2C lines, the values of pull-up resistors and the number of slaves connected to the I2C bus may influence the working frequency of the I2C bus. Besides, the frequency reflects the speed of a single byte transmission, but not the speed of transmitting all data. It is a fact that the time of data processing can exceed significantly the time of data transmission. That is why data transmitted at high speed can have no effect on the speed of the I2C bus if delays between bytes are longer than the bytes themselves.
The I2C transmission expects an Acknowledge bit after every byte. This bit is sent by a slave and by a receiver:
A slave sends an Acknowledge bit after the slave address and direction bit to signal that the device with the specified address is present on the I2C bus;
A receiver sends an Acknowledge bit after a data byte to signal that the byte was successfully received and another byte may be sent.
The Acknowledge signal is LOW on the SDA line that remains stable during the HIGH period of the ninth pulse on the SCL line. If the SDA line remains HIGH during this clock pulse, this is defined as Not Acknowledge signal. In this case, the master has the following options:
Generate a STOP (P) condition to abort the transmission;
Generate a repeated START (Sr) condition to start a new transmission.
DLN-1 and DLN-2 adapters provide one more option for the I2C master:
Generate a STOP (P) condition followed by a START (S) condition to start the same transmission from the very beginning.
This option allows to repeat transmission if acknowledgement was not received. By default, transmissions can repeat 10 times. If all these times acknowledgement was not received, the transmission is supposed to fail. If acknowledgement was received, the transmission is successful.
Using the DlnI2cMasterSetMaxReplyCount() function, you can change the maximum number of attempts to transmit data. The DlnI2cMasterGetMaxReplyCount() function allows to check the currently specified number of attempts.
DLN-series adapters support only 7-bit addressing. To start transmission, the I2C master generates the START (S) condition followed by seven bits of a slave address and an eighth bit which is a data direction bit.
7-bit addressing allows 127 different addresses. Some addresses are reserved (See Slave Address and Data Direction), only 112 devices can actually be connected to the I2C bus. To scan all possible addresses and to find devices connected to the I2C bus, us the DlnI2cMasterScanDevices() function. It returns the number of connected devices and the list of their addresses.You can use these addresses for I2C transmission in one of the following functions:
Receives data from the specified slave. Internal address can be specified (See READ Operation for details).
Sends data to the specified slave. Internal address can be specified (See WRITE Operation for details).
Sends data to the specified slave, then reads data from the same slave (only DLN-1 and DLN-2 adapters support this function).
The following example shows how to operate with I2C master module. You can find the complete example in the “..\Program Files\Diolan\DLN\examples\c_cpp\examples\simple
” folder after DLN setup package installation.
#include "..\..\..\common\dln_generic.h" #include "..\..\..\common\dln_i2c_master.h" #pragma comment(lib, "..\\..\\..\\bin\\dln.lib") int _tmain(int argc, _TCHAR* argv[]) { // Open device HDLN device; DlnOpenUsbDevice(&device); // Set frequency uint32_t frequency; DlnI2cMasterSetFrequency(device, 0, 100000, &frequency); // Enable I2C master uint16_t conflict; DlnI2cMasterEnable(device, 0, &conflict); // Prepare output buffer uint8_t output[8], input[8]; for (int i = 0; i < 8; i++) output[i] = i; // Write bytes DlnI2cMasterWrite(device, 0, 0x50, 1, 0, 8, output); // Read bytes DlnI2cMasterRead(device, 0, 0x50, 1, 0, 8, input); // Print input data for (int i = 0; i < 8; i++) printf("%02x ", input[i]); // Disable I2C master DlnI2cMasterDisable(device, 0); // Close device DlnCloseHandle(device); return 0; }
Line 1:#include "..\..\..\common\dln_generic.h"
The dln_generic..h
header file declares functions and data structures for the generic interface.
Line 2:#include "..\..\..\common\dln_i2c_master.h"
The dln_i2c_master.h
header file declares functions and data structures for the I2C master interface.
Line 3:#pragma comment(lib, "..\\..\\..\\bin\\dln.lib")
Use dln.lib
library while project linking.
Line 10:DlnOpenUsbDevice(&device);
The function establishes the connection with the DLN adapter. This application uses the USB connectivity of the adapter. For additional options, refer to the Device Opening & Identification section.
Line 14:DlnI2cMasterSetFrequency(device, 0, 100000, &frequency);
This function sets frequency on the I2C bus. It is set in Hertz. Any frequency value can be provided to the function, but only device compatible frequency will be set. You can read the actual frequency value by providing pointer to the unsigned 32-bit integer variable. You can read more about I2C bus speed and frequency by navigating to I2C Speed and Frequency section.
Line 17:DlnI2cMasterEnable(device, 0, &conflict);
This function enables I2C master module.
Line 21:for (int i = 0; i < 8; i++) output[i] = i;
Fill output array with the values from 0 to 8. It will be used as data buffer for sending it via I2C bus.
Line 23: DlnI2cMasterWrite(device, 0, 0x50, 1, 0, 8, output);
This function sends provided data buffer via I2C bus to connected I2C slave device. To send data properly to slave device it is required to provide also slave device address and memory address. You can read more about I2C addressing at I2C Addresses.
Line 26: DlnI2cMasterRead(device, 0, 0x50, 1, 0, 8, &input);
This function reads data from the I2C slave device. The parameters are almost similar to the data writing process.
Line 28: for (int i = 0; i < 8; i++) printf("%02x ", input[i]);
Print to console data, which was read from the I2C slave device.
Line 31: DlnI2cMasterDisable(device, 0);
Disable I2C master port.
Line 33: DlnCloseHandle(device);
Closing handle to the previously opened DLN-series adapter.
Use the I2C Master Interface functions to control and monitor the I2C Master module of a DLN-series adapter. The dln_i2c_master.h
file declares the I2C Master Interface functions.
General port information:
Retrieves the total number of I2C master ports available at your DLN-series adapter.
Assigns a port to the I2C Master module.
Releases a port from the I2C Master module.
Retrieves whether a port is assigned to the I2C Master module.
Scans all slave addresses searching for connected I2C slave devices.
I2C Master module configuration functions:
Configures frequency for the specified I2C master port.
Retrieves frequency configuration for an I2C Master port.
Configures the maximum reply count for an I2C master port.
Retrieves the maximum reply count configuration.
Transmission functions:
Receives data from the specified slave. Internal address can be specified.
Sends data to the specified slave. Internal address can be specified.
Sends data to the specified slave, then reads data from the same slave (only DLN-1 and DLN-2 adapters support this function).
The DlnI2cMasterDisable()
function releases the specified port from the I2C Master module.
The DlnI2cMasterEnable()
function assigns the specified port to the I2C Master module.
The DlnI2cMasterGetFrequency()
function retrieves the current I2C bus clock frequency.
The DlnI2cMasterGetMaxReplyCount()
function retrieves maximum reply count for I2C master port.
The DlnI2cMasterGetPortCount()
function retrieves the total number of I2C master ports available at your DLN-series adapter.
The DlnI2cMasterIsEnabled()
function checks whether the specified I2C master port is active or not.
The DlnI2cMasterRead()
function reads data from the specified I2C slave device.
The DlnI2cMasterScanDevices()
function scans all the 127 slave addresses searching for connected I2C slave devices.
The DlnI2cMasterSetFrequency()
function configures the clock frequency for the specified I2C port.
The DlnI2cMasterSetMaxReplyCount()
function sets maximum reply count for I2C master port.
DLN-1 and DLN-2 adapters cannot send a single slave address and direction bit without data bytes. This is a firmware driver limitation. Therefore, an adapter cannot read a single byte at all possible addresses. Retrying every read/write operation 10 times is set by default in firmware I2C driver, but using the DlnI2cMasterSetMaxReplyCount()
function you can modify this parameter.
The DlnI2cMasterTransfer()
function sends and receives data via the I2C bus. The data is sent and received as an array of 1-byte elements.
The DlnI2cMasterWrite()
function sends data to the specified I2C slave device.
Some DLN-series adapters support I2C slave interface.
Before you activate the I2C slave port, you need to configure it (See Configuring I2C Slave Interface).
You can configure events to be informed when an I2C master receives data from your slave and/or transmits data to it (See I2C Slave Events).
To provide the I2C communication, you need to configure the I2C slave port:
Specify the I2C slave address of your device. DLN adapters support 7-bit addressing. Some DLN adapters allow to specify several I2C slave addresses. For details, read I2C Slave Addressing.
Configure general call support. I2C slave can ignore or acknowledge the general call addressing when data can be transmitted to all I2C slaves simultaneously. For details, read General Call Support.
Configure generating events. Events can be generated when an I2C master initiates data transmission. If you do not need these notifications, cancel generating events. Read I2C Slave Events.
After you have finished configuring the I2C slave device, enable the I2C slave port by the DlnI2cSlaveEnable() function.
DLN adapters support only 7-bit addressing. To assign a I2C slave address to your device, use the DlnI2cSlaveSetAddress() function. This function does not prevent you from assigning reserved addresses to your DLN adapter. For more information about reserved addresses, read Reserved I2C Slave Addresses.
Some DLN adapters can support more than one I2C slave addresses simultaneously. To check how many I2C slave addresses are supported by your DLN adapter, use the DlnI2cSlaveGetAddressCount() function. To assign several I2C slave addresses to your DLN adapter, use the DlnI2cSlaveSetAddress() function for every address. In the function, you specify the slaveAddressNumber
parameter; its value should be unique for every I2C slave address but should not exceed the number of supported slave addresses.
To check an I2C slave address assigned to your device, call the DlnI2cSlaveGetAddress() function and point the desired value of the slaveAddressNumber
parameter. To check all assigned I2C slave addresses, call the DlnI2cSlaveGetAddress() function for every possible slaveAddressNumber
value.
I2C bus allows to transmit data to all I2C slaves simultaneously. This option is called General Call. To make a general call, the I2C master generates the following address: 0000 000 followed by the Write (0) direction bit. The General Call address is one of the reserved addresses and cannot be assigned to any I2C slave device.
When an I2C slave receives the general call address, it can acknowledge it to receive transmitted data or ignore it.
You can configure the I2C slave’s behavior when it receives the general call address:
If you want your DLN I2C slave port to acknowledge the general call addressing, call the DlnI2cSlaveGeneralCallEnable() function.
If you want your DLN I2C slave port to ignore the general call addressing, call the DlnI2cSlaveGeneralCallDisable() function.
To check the current configuration of the general call support, use the DlnI2cSlaveGeneralCallIsEnabled() function.
There are two ways to detect an I2C transmission:
To observe I2C lines permanently. This consumes much CPU time. Besides, the more times the device polls the I2C bus, the less time it can spend carrying out its intended function. That is why such devices are slow.
To receive events about the requests from the I2C bus. You can configure event generation when the I2C master addresses for receiving or transmitting data.
To configure events, use the DlnI2cSlaveSetEvent() function. You need to specify the slaveAddressNumber
and eventType
parameters. The DlnI2cSlaveGetSupportedEventTypes() function returns the list of event types available for the I2C slave port.
The eventType
parameter can have one of the following values:
| A DLN adapter does not generate any I2C events. |
| A DLN adapter generates events when the I2C master device initiates receiving data from the I2C slave address assigned to the DLN adapter. The |
| A DLN adapter generates events when the I2C master device initiates transmitting data to the I2C slave address assigned to the DLN adapter. The |
| A DLN adapter generates events when the I2C master device initiates receiving data from or transmitting data to the I2C slave address assigned to the DLN adapter. The |
By default, event generation is disabled for all I2C slave addresses (the eventType
parameter is set to DLN_I2C_SLAVE_EVENT_NONE
).
If your DLN adapter uses more than one I2C slave address, you can specify different event configuration for each I2C slave address.
A DLN adapter generates the DLN_I2C_SLAVE_EVENT_READ
events each time the I2C master device initiates receiving data from the I2C slave address assigned to the DLN adapter.
Use the DlnI2cSlaveSetEvent() function to configure events. Pass DLN_I2C_SLAVE_EVENT_READ
for the eventType
parameter.
The DLN_I2C_SLAVE_READ_EV
structure describes the event details: event counter, I2C slave address and port number, and the buffer size. The header of the structure contains the msgId
field that is set to DLN_MSG_ID_I2C_SLAVE_READ_EV (0x0C10)
.
A DLN adapter generates the DLN_I2C_SLAVE_EVENT_WRITE
events each time the I2C master device initiates transmitting data to the I2C slave address assigned to the DLN adapter.
Use the DlnI2cSlaveSetEvent() function to configure events. Pass DLN_I2C_SLAVE_EVENT_WRITE
for the eventType
parameter.
The DLN_I2C_SLAVE_WRITE_EV
structure describes the event details: event counter, I2C slave address and port number, the buffer size and the received data. The header of the structure contains the msgId
field that is set to DLN_MSG_ID_I2C_SLAVE_WRITE_EV (0x0C11)
.
A DLN adapter generates the DLN_I2C_SLAVE_EVENT_READ_WRITE
events each time the I2C master device initiates receiving data from or transmitting data to the I2C slave address assigned to the DLN adapter.
Use the DlnI2cSlaveSetEvent() function to configure events. Pass DLN_I2C_SLAVE_EVENT_READ_WRITE
for the eventType
parameter.
The DLN_I2C_SLAVE_EVENT_READ_WRITE
events are described by two structures:
The DLN_I2C_SLAVE_READ_EV
structure describes the I2C read event details: event counter, I2C slave address and port number, and the buffer size. The header of the structure contains the msgId
field that is set to DLN_MSG_ID_I2C_SLAVE_READ_EV (0x0C10)
.
The DLN_I2C_SLAVE_WRITE_EV
structure describes the I2C write event details: event counter, I2C slave address and port number, the buffer size and the received data. The header of the structure contains the msgId
field that is set to DLN_MSG_ID_I2C_SLAVE_WRITE_EV (0x0C11)
.
Use the I2C Slave Interface functions to control and monitor the I2C Slave module of a DLN-series adapter. The dln_i2c_slave.h
file declares the I2C Slave Interface functions.
General port information:
Retrieves the total number of I2C slave ports available at your DLN-series adapter.
Assigns a port to the I2C Slave module.
Releases a port from the I2C Slave module.
Retrieves whether a port is assigned to the I2C Slave module.
Loads data to be transmitted to an I2C master device.
I2C Slave module configuration functions:
Activates I2C general call support.
Disables I2C general call support.
Retrieves whether I2C general call support is activated.
Retrieves the number of I2C slave addresses supported by the DLN adapter.
Assigns an I2C slave address to the specified I2C slave module.
Retrieves one of the I2C slave addresses assigned to the specified I2C slave module.
I2C Slave event functions:
Configures event generation for an I2C slave port.
Retrieves event generation configuration for an I2C slave port.
Retrieves the list of event types available for an I2C slave port.
The DlnI2cSlaveDisable()
function deactivates the specified I2C slave port at your DLN-series adapter and releases the pins previously used for SDA and SCL lines.
The DlnI2cSlaveEnable()
function activates the specified I2C slave port at your DLN-series adapter.
The DlnI2cSlaveGeneralCallDisable()
function disables the I2C general call support to make this slave ignore general call addressing.
The DlnI2cSlaveGeneralCallEnable()
function activates I2C general call support. With general call all I2C slave devices on the circuit can be addressed by sending zero as I2C slave address.
The DlnI2cSlaveGeneralCallIsEnabled()
function checks whether I2C general call support is enabled for the specified I2C slave port.
The DlnI2cSlaveGetAddress()
function retrieves one of the I2C slave addresses, assigned to the specified I2C slave module. The total number of simultaneously assigned addresses can be retrieved with the DlnI2cSlaveGetAddressCount() function.
The DlnI2cSlaveGetAddressCount()
function retrieves the number of I2C slave addresses supported by the DLN adapter.
DLN-series adapters can acknowledge any I2C slave address. The limitation is only in the amount of slave addresses to be used simultaneously. You can use the DlnI2cSlaveSetAddress() function to configure the I2C slave module to acknowledge specific addresses.
The DlnI2cSlaveGetEvent()
function retrieves settings for I2C event generation for the specified I2C slave port and I2C slave address.
The DlnI2cSlaveGetPortCount()
function retrieves the total number of I2C slave ports available in your DLN-series adapter.
The DlnI2cSlaveGetSupportedEventTypes()
function returns all supported I2C slave event types for opened DLN-series adapter.
The DlnI2cSlaveIsEnabled()
function checks whether the specified I2C slave port is active or not.
The DlnI2cSlaveLoadReply()
function loads data to be transferred to an I2C master device.
The DlnI2cSlaveSetAddress()
function assigns I2C addresses to the specified I2C slave module. You can assign any 7-bit address, the limitation is only in quantity of addresses that can be used simultaneously. Use the DlnI2cSlaveGetAddressCount() function to retrieve the number of simultaneously supported I2C slave addresses.
The DlnI2cSlaveSetEvent()
function configures the I2C slave events generation conditions for the specified I2C slave port and I2C slave address.I2C slave events can vary for different I2C slave addresses. Specify the number of the I2C slave address in the slaveAddressNumber
parameter.
This section describes the structures used for I2C events. These structures are declared in the dln_i2c_slave.h
file.
The DLN_I2C_SLAVE_READ_EV
structure contains information about the I2C read event.
The DLN_I2C_SLAVE_WRITE_EV
structure contains information about the I2C write event.