Most of the DLN adapters support the SPI master interface. Some of them have several independent SPI master ports.
Before transmitting data, you need to configure the SPI master ports according to the slave requirements and enable it (See Configuring the SPI Master Interface).
You can either transmit data in full-duplex or in half-duplex mode (See SPI Data Transmission).
If you need to work with multi slave devices, you can interconnect them following the instructions in Connecting Multiple Slave Devices.
For reliable SPI communication, you have to configure the SPI master interface according to the SPI slave requirements:
Configure the clock (SCK) signal, using a frequency, which does not exceed the maximum frequency that the slave device supports. For details, read Clock Frequency.
Configure the transmission mode (clock polarity and clock phase). The clock polarity (CPOL) and clock phase (CPHA) configuration must be the same for both SPI master and SPI slave devices. For details, read Clock Phase and Polarity.
Configure the frame size. The frame size instructs the DLN adapter how to treat data inside the buffer. The data can be treated as 8-16 bit integers. If the configured frame size exceeds 8 bits, the bytes inside the frame are stored in Little Endian format. For details, read SPI Data Frames.
Customize releasing the SS line between frames. Some slave devices require the signal in the SS line going LOW to initiate data transmission. When the frame transmission is complete, the master should pull the SS line HIGH and then LOW again to reinitiate the frame transmission with the same slave. This parameter is optional. For details, read SS Line Release Between Frames.
If a slave device needs additional time to process or generate data, configure delays. For details, read SPI Delays.
To start communication, you need to select the slave. Dropping the signal on an SS line initiates data transmission between the master and the appropriate slave device. The Connecting Multiple Slave Devices section describes possible configurations. You can select a slave device before or after enabling the SPI master port.
SPI bus allows continuous data transmission. When you pass a buffer (array of words) to one of the SPI Master Transmission Functions, the DLN adapter transmits the data bit after bit as in the following figure.
Logically, your application and an SPI slave device treat this data as an array of 8-bit or 16-bit words. Some SPI slave devices (for example, digital-to-analog or analog-to-digital converters) operate with 12-bit words.
DLN adapters allow you to support a wide range of SPI slave devices. You can configure the frame size (number of bits in the word) by using the DlnSpiMasterSetFrameSize() function. DLN adapters support 8 to 16 bits per frame.
In DLN adapters, the frame data is transmitted in a Little Endian format (starting from the most-significant bit and up to the least-significant bit). If the frame size is not a multiple of 8, the unused (most-significant) bits are discarded, regardless of their content.
You want to transmit an array with the following data: ABCDEF01
If the frame size is 8 bits, the transmission proceeds as four 8-bit words: AB CD EF 01
If the frame size is 16 bits, the transmission proceeds as two 16-bit words. Each word is stored in the array in little endian format: CDAB 01EF
If the frame size is 12 bits, the transmission proceeds as two 12-bit words. This frame is not a multiple of 8, so the unused (most-significant) bits of the second byte in each word are discarded: ABC EF0
.
Each word is stored in the array in little endian format: CAB 0EF
To transmit data as arrays of more than 8 bits, you can use the DlnSpiMasterReadWrite16() function. It transmits data in little endian format that is very useful because most microcontrollers store data in this format.
For information about all functions that you can use to transmit data, read the SPI Master Transmission Functions section.
By default, if an array of several frames is transmitted between the master and the same slave, the SS line stays enabled until data transmission completes.
However, some SPI slave devices require the SS line to be deasserted between frames.
To release the SS line, use the DlnSpiMasterReleaseSS(). Use the DlnSpiMasterSSEnable() function to enable the SS line.
If an SPI slave device is not fast enough to process continuously incoming data, you can configure your DLN adapter to introduce a specified delay between frames. For more information about this and other delays, read SPI Delays.
SPI bus can operate at very high speeds, which may be too fast for some slave devices. To accommodate such devices, the SPI bus contains the clock (CLK). The signal on the SCK line is transmitted with the same frequency as data flows. Thus, there is no need to synchronize the transmission speed of master and slave devices.
To configure the clock signal of the master, use the DlnSpiMasterSetFrequency() function.
When configuring the SPI master interface, you specify the frequency value supported by the slave device. If the specified value is not compatible with your DLN adapter, the function approximates the value to the closest lower frequency value supported by the adapter.
A range of supported clock frequency values depends on the DLN adapter:
DLN-1 adapters support clock frequency from 2kHz up to 4MHz.
DLN-2 adapters support clock frequency from 2kHz up to 18MHz.
DLN-4 adapters support clock frequency from 376kHz up to 48MHz.
In addition to setting the clock frequency, the master also configures the clock polarity (CPOL) and clock phase (CPHA). For detailed information, read Clock Phase and Polarity.
The master configures the clock polarity (CPOL) and clock phase (CPHA) to correspond to slave device requirements. These parameters determine when the data must be stable, when it should be changed according to the clock line and what the clock level is when the clock is not active.
The CPOL parameter assigns the clock level when the clock is not active. The clock (SCK) signal may be inverted (CPOL=1) or non-inverted (CPOL=0). For the inverted clock signal, the first clock edge is falling. For the non-inverted clock signal, the first clock edge is rising.
The CPHA parameter is used to shift the capturing phase. If CPHA=0, the data are captured on the leading (first) clock edge, regardless of whether that clock edge is rising or falling. If CPHA=1, the data are captured on the trailing (second) clock edge; in this case, the data must be stable for a half cycle before the first clock cycle.
There are four possible modes that can be used in an SPI protocol:
For CPOL=0, the base value of the clock is zero. For CPHA=0, data are captured on the clock’s rising edge and data are propagated on a falling edge.
For CPOL=0, the base value of the clock is zero. For CPHA=1, data are captured on the clock’s falling edge and data are propagated on a rising edge.
For CPOL=1, the base value of the clock is one. For CPHA=0, data are captured on the clock’s rising edge and data are propagated on a falling edge.
For CPOL=1, the base value of the clock is one. For CPHA=1, data are captured on the clock’s falling edge and data are propagated on a rising edge.
In DLN adapters, the default transmission mode configuration has CPOL=0, CPHA=0 values.
You can specify the mode using the DlnSpiMasterSetMode() function. To configure the CPOL and CPHA values separately, use the DlnSpiMasterSetCpol() and DlnSpiMasterSetCpha() functions.
The master and a slave must use the same set of parameters (clock frequency, CPOL and CPHA); otherwise, a communication will be impossible. If multiple slaves are used, the master configuration should change each time before the master initiates communication with a different slave.
DLN adapters can operate in the following modes:
Full-duplex – the master sends data to a slave and receives data from the slave simultaneously.
Half-duplex (read) – the master receives data from a slave.
Half-duplex (write) – the master sends data to a slave.
A full-duplex data transmission occurs during each SPI clock cycle: the master transmits data to the slave on the MOSI line and the slave receives it; at the same time, the slave transmits data to the master on the MISO line and the master receives it.
To transmit data in a full-duplex mode, use the DlnSpiMasterReadWrite() function (for 8-bit frames) or the DlnSpiMasterReadWrite16() function (for 9-16-bit frames).
Transmission may continue for any number of clock cycles. When complete, the master idles the clock and releases the SS line. Using the DlnSpiMasterReadWriteEx() function, you can configure whether to release SS line after the transmission or to leave it on the low level.
The DlnSpiMasterReadWriteSS() function allows to select the SS line, transmit data and release the SS line. For details, read Connecting Multiple Slave Devices.
In a half-duplex read mode, the slave transmits data on the MISO line and the master receives it. The MOSI line remains inactive.
To receive data in a half-duplex mode, use the DlnSpiMasterReadEx() function. This function allows to configure whether the SS line should be released after the transmission or left on the low level.
In a half-duplex write mode, the master sends data on the MOSI line and the slave receives it. The MISO line remains inactive.
To send data in a half-duplex mode, use the DlnSpiMasterWriteEx() function. This function allows to configure whether the SS line should be released after the transmission or left on the low level.
In a half-duplex mode, the master can send data to multiple slaves simultaneously. For details, read Connecting Multiple Slave Devices.
In SPI, a master can communicate with a single or multiple slaves. For applications using multiple slaves, the following configurations are possible:
Independent slaves. This is a most common configuration of the SPI bus. The MOSI, MISO and SCK lines of all slaves are interconnected. The SS line of every slave device is connected to a separate pin of SPI master device. Since the MISO pins of the slaves are connected together, they are required to be tristate pins (high, low or high-impedance).
To select the slave, the master pulls the corresponding SS line low. Only one slave can be selected.
For DLN-1 or DLN-2 adapters, you can use the following functions:
to select the SS line. The SS line value can include only one bit set to 0;
to transmit data to/from the slave device;
to release the SS line after transmission if the master does not need to transmit more data to the same slave.
For a DLN-4M adapter, use the DlnSpiMasterReadWriteSS() function – it selects the specified SS line, transmits data and releases the SS line.In a half-duplex read mode, you can also select only one slave. The following functions can be used:
to select the SS line. The SS line value can include only one bit set to 0;
to read data from the slave device and to release the SS line after transmission if required.
Independent slave configuration with decoder/demultiplexer. The SS lines are used to send an n-bit value, which is the number of the selected slave. Here, the master can communicate with m=2n slaves.
If you use this configuration, in the DlnSpiMasterSetSS() function the value of the SS lines can include more than one zeros. The demultiplexer converts this value and activates only one SS line.
Half-duplex write configuration. The master transmits data on the MOSI line and the slave receives it. The MISO line remains inactive.
If your slave devices only receive data, you can address multi slaves simultaneously. The following functions can be used:
to select the SS line; the SS line value can include more than one bits set to 0 (several SS lines can be selected – the master can send data to several slave devices simultaneously);
to write data from the slave device(s) and to release the SS line(s) after transmission (optionally).
If the master always sends equal data to some group of slaves in a half-duplex write configuration, all the slaves from the group can be connected to one SS line:
Daisy-chain slaves: the first slave output is connected to the second slave input, etc. The SPI port of each slave is designed to send out during the second group of clock pulses an exact copy of the data it received during the first group of clock pulses.
To check the number of available SS lines in the SPI port, use the DlnSpiMasterGetSSCount() function.
To select the slave, use the DlnSpiMasterSetSS() function. By default, the first SS line (SS0) is selected.
Only one slave can be activated (the signal level on the SS line is low). However, if you use a demultiplexer, you do not select the line, but set the value of the line. The demultiplexer converts this value and selects only one SS line.
The DlnSpiMasterEnable() function enables the selected SS line. Use this function after you configure communication settings.
If you do not need to use all SS lines available in a SPI port, you can disable some of them to use them in other modules. On the contrary, you can enable SS lines that were used for other modules. To disable one SS line, use the DlnSpiMasterSSDisable() function. To disable several SS lines, use the DlnSpiMasterSSMultiDisable() function. To enable one or more SS lines, use the DlnSpiMasterSSEnable() or DlnSpiMasterSSMultiEnable() function accordingly.
Sometimes slave devices need additional time to process data. In order to provide this time, DLN-series adapters can insert delays at different data transmission stages:
Delay between data frames;
Delay after slave selection;
Delay between slave selections.
All of the delays are set in nanoseconds (ns) and are configured only once. The defined delay values are the same for all SS lines of the port.
In case a slave device is not fast enough to process continuously incoming data, you can configure the DLN adapter to insert delays between each two consecutive frames. This gives the slave device additional time to process the data from the previous frame. Once enabled, the delay is inserted after each frame.
The default value of the delay between frames is 0ns. The delay value is adjusted using the DlnSpiMasterSetDelayBetweenFrames() function. The current delay between frames value can be retrieved by calling the DlnSpiMasterGetDelayBetweenFrames() function.
When an SPI slave device needs additional time for initialization, you can configure delay after slave selection (SS). When enabled, the delay is introduces after SS line assertion and before transmission of the first data bit.
The default value of the delay after slave selection is 0ns. To adjust the delay value, use the DlnSpiMasterSetDelayAfterSS() function. To retrieve the current delay value, call the DlnSpiMasterGetDelayAfterSS() function.
Delay between slave selections is inserted after one SS line release and before assertion of another SS line.
The default value of the delay between slave selections is 62ns. The delay value is adjusted using the DlnSpiMasterSetDelayBetweenSS() function, and can be retrieved using the DlnSpiMasterGetDelayBetweenSS() function.
SPI master interface allows you a wide choice of functions for transmission data. These functions differ:
by operation mode;
by frame size;
by additional attributes.
The following list includes possible functions with brief descriptions:
Provides SPI communication in a full-duplex mode (sends and receives data). The function treats data as arrays of 8-bit frames.
Provides SPI communication in a full-duplex mode (sends and receives data). The function treats data as arrays of frames up to 16 bits.
Provides SPI communication in a full-duplex mode (sends and receives data).The function treats data as arrays of 8-bit frames. When transmission completes, the function can release the SS line or leave it active.
Provides SPI communication in a full-duplex mode (sends and receives data). The function treats data as arrays of 8-bit frames. The function allows to select the specified SS line. When transmission completes, the function releases the SS line.
Provides SPI communication in a half-duplex read mode (receives data). The function treats data as an array of 8-bit frames.
Provides SPI communication in a half-duplex read mode (receives data). The function treats data as an array of 8-bit frames. When transmission completes, the function can release the SS line or leave it active.
Provides SPI communication in a half-duplex write mode (sends data). The function treats data as an array of 8-bit frames.
Provides SPI communication in a half-duplex write mode (sends data). The function treats data as an array of 8-bit frames. When transmission completes, the function can release the SS line or leave it active.
The following example shows how to transmit data over SPI bus. For brevity, this example uses default SPI configuration and does not include error detection. You can find the complete example in the “..\Program Files\Diolan\DLN\examples\c_cpp\examples\simple
” folder after DLN setup package installation.
#include "..\..\..\common\dln_generic.h" #include "..\..\..\common\dln_spi_master.h" #pragma comment(lib, "..\\..\\..\\bin\\dln.lib") int _tmain(int argc, _TCHAR* argv[]) { // Open device HDLN device; DlnOpenUsbDevice(&device); // Set SPI frequency uint32_t frequency; DlnSpiMasterSetFrequency(device, 0, 100000, &frequency); // Enable SPI master uint16_t conflict; DlnSpiMasterEnable(device, 0, &conflict); // Prepare output buffer uint8_t input[10], output[10]; for (int i = 0; i < 10; i++) output[i] = i; // Perform SPI transaction DlnSpiMasterReadWrite(device, 0, 10, output, input); // Print received data for (int i = 0; i < 10; i++) printf("%02x ", input[i]); // Disable SPI and close device DlnSpiMasterDisable(device, 0, 0); DlnCloseHandle(device); return 0; }
Line 1:#include "..\..\..\common\dln_generic.h"
The dln_generic..h header file declares functions and data structures for the generic interface.
Line 2: #include "..\..\..\common\dln_spi_master.h"
The dln_spi_master.h
header file declares functions and data structures for the SPI master interface.
Line 3:#pragma comment(lib, "..\\..\\..\\bin\\dln.lib")
Use specified dln.lib
library while project linking.
Line 9:DlnOpenUsbDevice(&device);
The application establishes the connection with the DLN adapter. This application uses the USB connectivity of the adapter. For additional options, refer to the Device Opening & Identification section.
Line 13:DlnSpiMasterSetFrequency(device, 0, 100000, frequency);
The application configures the frequency of the SPI master port 0. You can also configure SPI transmission mode, frame size, etc. See Configuring the SPI Master Interface for details.
Line 17:DlnSpiMasterEnable(device, 0, conflict);
The application enables the SPI master port 0. The DlnSpiMasterEnable() function assigns the corresponding pins to the SPI master module and configures them. If some other module uses a pin required for the SPI bus interface, the DlnSpiMasterEnable() function returns the DLN_RES_PIN_IN_USE
error code. The conflict
parameter receives the pin’s number.
Lines 21:for (int i = 0; i < 10; i++) output[i] = i;
The application allocates buffers for output and input data. The output buffer is filled with the sequential numbers from 0 to 9.
Line 24:DlnSpiMasterReadWrite(device, 0, 10, output, input);
The DlnSpiMasterReadWrite() function transmits the data to and from the SPI slave device. See the SPI Master Transmission Functions section for additional data transmission functions.
Line 27:for (int i = 0; i < 10; i++) printf("%02x ", input[i]);
The application prints the buffer received from the SPI slave device.
Line 30:DlnSpiMasterDisable(device, 0);
The application releases the SPI master port.
Line 31:DlnCloseHandle(device);
The application closes the handle to the DLN adapter.
The default configuration for the SPI master port is as 8-bit SPI master with CPOL=0 and CPHA=0 transmission parameters. By default, the clock is selected with a frequency of 1Mhz.
Using the SPI master functions allows you to change and check the current SPI master configuration, to control data transmission.
The SPI master functions include the following:
General port information:
Retrieves the number of SPI master ports available in the DLN adapter.
Assigns the selected port to the SPI master module.
Releases the selected SPI master port.
Retrieves whether the selected port is assigned to the SPI master module.
Configuration functions:
Configures the clock frequency for the selected SPI master port.
Retrieves the clock frequency configuration for the SPI master port.
Configures the size of a single data frame for the selected SPI master port.
Retrieves the data frame configuration for the selected SPI master port.
Configures the transmission mode based on CPOL and CPHA values.
Retrieves the transmission mode configuration for the selected SPI master port.
Configures the CPOL value for the selected SPI master port.
Retrieves the CPOL value for the selected SPI master port.
Configures the CPHA value for the selected SPI master port.
Retrieves the CPHA value for the selected SPI master port.
Retrieves the supported transmission modes for the selected SPI master port.
Retrieves the supported CPOL values for the selected SPI master port.
Retrieves the supported CPHA values for the selected SPI master port.
Slave selection functions:
Retrieves the available number of SS lines for the selected SPI master port.
Selects a Slave Select (SS) line.
Retrieves the selected SS line.
Activates the selected SS line.
Disables the selected SS line.
Retrieves whether the selected SS line is activated.
Activates several selected SS lines.
Disables several selected SS lines.
Retrieves whether several selected SS lines are activated.
Releases the selected SS line.
Activates releasing SS line between data frames exchanged with a single slave device.
Disables releasing SS line between data frames exchanged with a single slave device.
Retrieves whether releasing SS line between data frames is activated.
Transmission functions:
Provides SPI communication in a full-duplex mode with arrays of 8-bit frames.
Provides SPI communication in a full-duplex mode with arrays of frames up to 16 bits.
Provides SPI communication in a full-duplex mode with arrays of 8-bit frames; can release the SS line after transmission.
Provides SPI communication in a full-duplex mode with arrays of 8-bit frames; releases the SS line after transmission.
Provides SPI communication in a half-duplex read mode with arrays of 8-bit frames.
Provides SPI communication in a half-duplex read mode with arrays of 8-bit frames; can release the SS line after transmission.
Provides SPI communication in a half-duplex write mode with arrays of 8-bit frames.
Provides SPI communication in a half-duplex write mode with arrays of 8-bit frames; can release the SS line after transmission.
Delay functions:
Configures a delay between data frames exchanged with a single slave device.
Retrieves current delay between data frames exchanged with a single slave device.
Configures a delay between activating SS line and the first data frame.
Retrieves current delay between activating SS line and the first data frame.
Configures a minimum delay between releasing one SS line and activating another SS line.
Retrieves current delay between releasing one SS line and activating another SS line.
The dln_spi_master.h
file declares the SPI Master Interface functions.
The DlnSpiMasterGetPortCount()
function retrieves the total number of SPI master ports available in your DLN-series adapter.
The DlnSpiMasterEnable()
function activates the selected SPI master port on your DLN-series adapter.
The DlnSpiMasterDisable()
function releases the selected SPI master port on your DLN-series adapter.
The DlnSpiMasterIsEnabled()
function retrieves whether the specified SPI master port is activated.
The DlnSpiMasterSetFrequency()
function sets the clock frequency on the SCK line, used to synchronize data transmission between master and slave devices.
The DlnSpiMasterGetFrequency()
function retrieves the current setting for SPI clock frequency.
The DlnSpiMasterSetFrameSize()
function sets the size of a single SPI data frame.
The DlnSpiMasterGetFrameSize()
function retrieves the current size setting for SPI data frame.
The DlnSpiMasterSetMode()
function sets SPI transmission parameters (CPOL and CPHA).
The DlnSpiMasterGetMode()
function retrieves current configuration of the selected SPI master port.
The DlnSpiMasterSetCpol()
function sets the clock polarity value.
The DlnSpiMasterGetCpol()
function retrieves the current value of clock polarity (CPOL).
The DlnSpiMasterSetCpha()
function allows to set clock phase (CPHA) value.
The DlnSpiMasterGetCpha()
function retrieves the current value of clock phase (CPHA).
The DlnSpiMasterGetSupportedModes()
function retrieves all supported SPI master modes (CPOL and CPHA values). For more information, read Clock Phase and Polarity.
The DlnSpiMasterGetSupportedCpolValues()
function retrieves supported CPOL values.
The DlnSpiMasterGetSupportedCphaValues()
function retrieves the available CPHA values.
The DlnSpiMasterGetSSCount()
function returns the available number of SS lines.
The DlnSpiMasterSetSS()
function selects a Slave Select (SS) line.
The DlnSpiMasterGetSS()
function retrieves current Slave Select (SS) line.
The DlnSpiMasterSSEnable()
function enables the specified SS line.
The DlnSpiMasterSSDisable()
function disables the specified SS line.
The DlnSpiMasterSSIsEnabled()
function enables the specified SS line.
The DlnSpiMasterSSMultiEnable()
function enables the specified SS lines.
The DlnSpiMasterSSMultiDisable()
function enables the specified SS lines.
The DlnSpiMasterSSMultiIsEnabled()
function enables the specified SS lines.
The DlnSpiMasterReleaseSS()
function releases SS lines.
The DlnSpiMasterSSBetweenFramesEnable()
function enables release of an SS line between data frames exchanged with a single slave device.
The DlnSpiMasterSSBetweenFramesDisable()
function disables release of an SS line between data frames exchanged with a single slave device.
The DlnSpiMasterSSBetweenFramesIsEnabled()
function checks whether the DLN-series adapter releases SS line between successive SPI frames transmission.
The DlnSpiMasterReadWrite()
function sends and receives data via SPI bus. The received and sent data are arrays of 1-byte elements. This function is suited to transmit data frames of 8 bits or less. In case you set a frame size more than 8 bits, it is advised to use the DlnSpiMasterReadWrite16() function.
The DlnSpiMasterReadWrite16()
function sends and receives 2-byte frames via SPI bus.
The DlnSpiMasterReadWriteSS()
function selects the specified SS line, transmits data via SPI bus and releases the SS line.
The DlnSpiMasterReadWriteEx()
function sends and receives data via SPI bus. The data is transmitted as an array of 1-byte elements. In this function you can use additional attributes to configure the SS line state after data transmission.
The DlnSpiMasterRead()
function receives data via SPI bus. The received data is an array of 1-byte elements.
The DlnSpiMasterReadEx()
function receives data via SPI bus. The received data is an array of 1-byte elements. In this function you can use additional attributes to configure the SS line state after data transmission.
The DlnSpiMasterWrite()
function sends data via SPI bus. The data is sent as an array of 1-byte elements.
The DlnSpiMasterWriteEx()
function sends data via SPI bus. The data is sent as an array of 1-byte elements. By using this function you can use additional attributes.
The DlnSpiMasterSetDelayBetweenFrames()
function sets a delay between data frames exchanged with a single slave device. For more information, read SPI Delays.
The DlnSpiMasterGetDelayBetweenFrames()
function retrieves current setting for delay between data frames exchanged with a single slave device.
The DlnSpiMasterSetDelayAfterSS()
function sets a delay duration between assertion of an SS line and first data frame. For more information, read SPI Delays.
The DlnSpiMasterGetDelayAfterSS()
function retrieves the current setting for minimum delay between assertion of an SS line and the first data frame.
The DlnSpiMasterSetDelayBetweenSS()
function sets a minimum delay between release of an SS line and assertion of another SS line. For more information, read SPI Delays.
The DlnSpiMasterGetDelayBetweenSS()
function retrieves the current setting for minimum delay after one SS line is released and before another SS line is asserted.